CLope30New Contributor7 years agoNIOS II hard fault due to pulse interrupt Hi, I have a NIOS II system and I was sending a pulse interrupt (of 16 clock cycles). The NIOS was going to an exception handler instead of the ISR. I changed the pulse to a level signal and added a...Show More
Recent DiscussionsError generating BSPSolvedNIOS V/m dbg_reset_out signal (Q25.1 Std, MAX10)SolvedWhere is FreeRTOS-Plus-TCP DesignSolvedNIOS-V QSYS Warning Properties (associatedClock) have been set onSolvedDK-DEV-AGI027-RA: JTAG chain broken after Nios V Hello, FPGA recovery fails