Nios II Gen2 core error

In the meanwhile I saw the options in the Gen2 Parameters dialog - one to keep the 32nd bit mechanism, the other to assign a peripheral (I assume uncached) memory range. There you can define the size of the uncached region and the base address. Afterwards you most probably have to manually assign the peripherals in question to addresses in that range.

But no matter if the 32nd bit mechanism is enabled or not, the linker throws an arrow when you call the alt_remap_uncached function. How I used the function looks like this:

dpr_interface =  (tDPRInterface*) alt_remap_uncached((void*) (DPRAM_BUFFER_BASE), sizeof(tDPRInterface));

And I never access the stuff with a cached pointer. I do get an cached pointer but purely by

dpr_interface_c =  (tDPRInterface*) (DPRAM_BUFFER_BASE);

This I need to issue DMA transfers to/from the DPRAM. If you use "uncached" addresses the DMA transfer is not happening - lost somewhere in the avalon interconnect I guess.

In the beginning I considered going down the linker path, what I think is what you suggested. That would mean working with

__attribute__((section(".mysection")))

.

Somehow I preffered the prior solution because I felt, that it lets me manipulate the ongoings more freely - of course having the pitfalls in mind. I build a system where two Nios CPUs and 4 DMAs are acting on the DPRAM and everything goes smooth.

If I build my system by 14.1 - using Nios classic or Gen2, doesn't matter - I can't get any of the two CPUs to run. If I build under 13.1 everything runs fine. But this would be subject to another thread...