Honored Contributor
Honored ContributorI am having a similar problem. I have a system with:
UART (RS-232) + NIOS + ON-CHIP RAM, C program runs OK UART (RS-232) + NIOS + ON-CHIP RAM + DDR, get "leaving processor paused" problem. It does appear like a timing-related issue but I cannot find a proper .sdc generated by SOPC builder for the first case to improve on. What I see in the first case is that the clock frequency is set to 1 GHz as all clocks are (as if proper clock constraints are missing) through I set in SOPC builder the frequency of the input clock to the system to 144 MHz. The first case appears to work because it is a simple system. The second case with DDR appears to fail because the NIOS is now constrained differently. cpu.sdc does not contain any clock frequencies. I am using Quartus II 8.0 and NIOS 8.0 on Linux with OpenCore Plus evaluation mode. Any information would be appreciated. RAUL
