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Altera_Forum
Honored Contributor
14 years agoNios II Data cache bypass
Hello, I've created a SOPC component, where Avalon-MM slave port is connected directly to the Dual-Port RAM (1 read port, 1 write port). The hardware writes to the DPRAM and I want to reach that d...
Altera_Forum
Honored Contributor
14 years agoSo this solution should be fine. I'll do more tests - if anything will go bad, I'll post results here.