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Altera_Forum
Honored Contributor
Honored ContributorNios II Data cache bypass
Hello, I've created a SOPC component, where Avalon-MM slave port is connected directly to the Dual-Port RAM (1 read port, 1 write port). The hardware writes to the DPRAM and I want to reach that d...
Altera_ForumHonored Contributor
Honored ContributorEh, just found a dumb mistake. The pointer actually worked fine, I just made a bug with bitmasks, so sometimes, shorter numbers passed the mask and longer ones didn't. This was nothing to do with the pointer or cache.
However, is that approach is correct? I am doing testing now, but I want to be sure, that such problems won't occour in the future. How do I avoid accessing cache at all?
