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Altera_Forum
Honored Contributor
14 years agoNios II Data cache bypass
Hello, I've created a SOPC component, where Avalon-MM slave port is connected directly to the Dual-Port RAM (1 read port, 1 write port). The hardware writes to the DPRAM and I want to reach that d...
Altera_Forum
Honored Contributor
14 years agoI tend to define:
typedef volatile unsigned int v_uint; and similar, then use those for reference to hardware data (eg when defining structures that overlay hardware registers). Makes it easier to get the 'volatile' in the right place. How are you modifying the data? You need to ensure that you NEVER access the relevant cache lines.