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Altera_Forum
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7 years ago

Nios II 32-bits read access to a 16-bits SRAM problem

Hi. I have a 16-bit data width SRAM (CY62167EV30LL-45BVXI) connected to my FPGA. I want to get NIOS II accessing it. The accesses, write or read, are working OK using 8 bits or 16 bits accesses...
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Altera_Forum
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7 years ago

This sounds familiar, unfortunately I don't remember the details but you might be able to fix this by placing a 16-bit pipeline bridge between Nios and the tristate logic.