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Altera_Forum
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14 years ago

Nios II - Data cache problem

Hi all, I'm using a Cyclone III DSP Kit (DK-DSP-3C120N) and uClinux. Some days ago I realized a working design which includes a Nios II processor characterized by only an instruction cache. Wi...
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Altera_Forum
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14 years ago

IIRC you normally use the return value from ioremap_nocache().

- it returns NULL on failure.

Doing a memset() on device registers isn't necessarily a good idea either. You probably want much more control over the actual bus cycles used.