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Altera_Forum
Honored Contributor
14 years agoNios II - Data cache problem
Hi all, I'm using a Cyclone III DSP Kit (DK-DSP-3C120N) and uClinux. Some days ago I realized a working design which includes a Nios II processor characterized by only an instruction cache. Wi...
Altera_Forum
Honored Contributor
14 years agoHi again,
after some weeks I got back on the issue and as you suggested I used fflush(fd) to force data flush, but nothing changed. I have to use data cache so I'd like to resolve this issue. Is it enough to add fflush(fd) after every write or do I need to do something else? Thanks in advance Marco