You can:
* insert your FPGA memory inside Qsys (On-Chip Memory) -- but then you would have a hard time getting your custom component outside Qsys to write to that memory, unless you use a bridge (below)
* insert an Avalon Bridge and connect Nios to it's slave interface, then export the master interface. Use the Avalon signals to connect it to your MegaWizard memory in the top level. This is the only way I've found in years to connect your processor to something outside Qsys. I've just tried with the Avalon Pipeline Bridge but the signals won't match your memory interface, you need a bridge with the right subset of signals. As there's none, I've made one for you -- just rename to .tcl and put it in the same directory as your .qsys.
It took me not more than five minutes to make this component, that's why I insist that you read the documents and watch the free trainings I told you about, as they will teach you how to do it, as you will certainly need it sooner or later.