Nested interrupts again

If you want to do something in a super-high-priority interrupt this needs to be something very short running and thus of low complexity.

Such a thing very likely can be easily done in hardware (HDL code).

If it needs informations directly from the CPU or sends some information directly to the CPU you can provide the hardware module with an Avalon slave interface with "registers" for status informations and/or a FIFO for data to be transferred.

If it needs to access the memory or some peripheral device, you can provide it with an Avalon master interface (have it be a DMA controller).

Of course you can do both interfaces if appropriate (see the Altera DMA controllers).

Of course accessing pins is "standard" for a HDL module.

So I don't suppose a coprocessor-CPU is a viable option here.

-Michael