Nested interrupts again

Hmmmm,

Thank you Michael, we also suggest solution with another Nios processing just fast interrupts. But yes, this is a complication, so I was thinking about the easiest way - nesting interrupt - but I know there can be also problems with the right content of stack when returning from such non-standard nested exception.

Hippo I dont know if you are right, I know, that "inthandler" (in entry.S) is the function put at interrupt vector address. And from the code investigation I did not find, that interrupts are somewhere re-enabled. But maybe I do not understand the right meaning of IRQF_DISABLED. Can you explain to me, how does it work? I know, that PIE (in "status" register) must be one and "ipending" register must be non-zero - this is the cause of any interrupt. But NIOS automatically sets PIE to zero on interrupt vector entry. So, in which place inside the standard interrupt handler sets PIE to 1 allowing nested interrupts?

jan