Forum Discussion
Altera_Forum
Honored Contributor
9 years agoBob,
I don't think I mentioned, but my mSGDMA hooked up to SDRAM works near flawlessly, except for an issue where the first 2046 bytes out are zeroes. After that it works great, I believe, but am not sure if I'm seeing discontinuous points at the boundary on starting a run. This is the data path fifo depth, so it's highly suspicious behavior. I'm also not using packetized data. The ones that have trouble are tied to onchil memory tied to the fast bus. https://github.com/altera-opensource/linux-socfpga/blob/a24e3d414e59ac76566dedcad1ed1d319a93ec14/drivers/net/ethernet/altera/altera_msgdma.c Thanks for the thought-- but no exact luck on this. The only difference might be their clearing of the status register before resetting the mSGDMA, but they are also not using a prefetcher. The DMAs that I'm working with require the ability to go in to park mode for continuous data transfer/interrupts, or at least a good facsimile thereof. I'll definitely try to clear the status bits first and after, though. And switch to unaligned accesses per the rocketboards recommendations. Cheers, Josh