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The lightweight bridge is 32-bit because it's mostly meant for controlling IP (accessing control and status registers) whereas the H2F bridge is intended for higher throughput memory transfer operations. That said if you are looking to maximize the performance having the FPGA move data in/out of the HPS through the FPGA-to-SDRAM interface is going to be the fastest method for bulk data.
In order for either of the H2F bridges to operate they need to be mapped into the address space (registers in the system manager control this) as well as they have to be receiving an active clock and pulled out of reset. The security of the bridge slave ports also needs to be set accordingly, by default the entire system is secure so if you have been dividing the system in secure and non-secure regions it could be security getting into the way.
That's about all I can tell you without knowing how it fails. Do you get a memory access error if you attempt to access the FPGA? Does the system crash when you attempt to access the FPGA? Does the MPU lock up when you attempt to access the FPGA, and if so have you checked to see if the transaction reaches the FPGA using signaltap?
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Hi BadOmen,
Thanks for your reply. Now,I am able to use H2F AXI bridge; which ofcourse increase throughput. Now, my second point is to decrease latency so could you please let me know which method should I use?
For calling component I am using dev/mem method which is calling my component so as per my thoughts which is leading to increase latency. so could you please let me know other method.
Many thanks in advance :)
Honored Contributor
