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Altera_Forum
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9 years ago

Minimal Cyclone V SE Testsystem on DE0-NANO-SOC: Uboot dies right after FPGA config

Hi, I made a minimum System in Quartus 15.1. The Qsys Systems consist only of an AvalonMM UART and a 8 bit PIO for the LEDs. The only bridge used is the lightweight HPS4FPGA one (in32bit mode)....
Altera_Forum's avatar
Altera_Forum
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9 years ago

Is there anything I'm overlooking? Do I need to enable any additional clocks? (I wouldn't know why, but I'm thankful for any hints).

Markus