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Altera_Forum
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8 years ago

Minimal Cyclone V SE Testsystem on DE0-NANO-SOC: Uboot dies right after FPGA config

Hi, I made a minimum System in Quartus 15.1. The Qsys Systems consist only of an AvalonMM UART and a 8 bit PIO for the LEDs. The only bridge used is the lightweight HPS4FPGA one (in32bit mode)....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Turns out it's the export of the

.hps_0_f2h_cold_reset_req_reset_n ( ~hps_cold_reset ), // In :

.hps_0_f2h_debug_reset_req_reset_n ( ~hps_debug_reset ), // In :

.hps_0_f2h_warm_reset_req_reset_n ( ~hps_warm_reset ), // In :

lines in the HPS. If I unexport them, U-Boot stays alive. I'm now struggling getting a working devicetree for my 4.0 Kernel. Oh my the sopc2dts sucks for 4.xx Kernels. Any hints on a start?

The GHRD tree crashes later in the boot process as there is only the lightweight bridge and not the other stuff. How would the handoff in uboot look like for only enabling this very bridge?

Markus