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Altera_Forum
Honored Contributor
9 years agoMinimal Cyclone V SE Testsystem on DE0-NANO-SOC: Uboot dies right after FPGA config
Hi, I made a minimum System in Quartus 15.1. The Qsys Systems consist only of an AvalonMM UART and a 8 bit PIO for the LEDs. The only bridge used is the lightweight HPS4FPGA one (in32bit mode)....
Altera_Forum
Honored Contributor
9 years agoMarkus -
I have no guesses off the top of my head. This may be one of those situations where you need to go back to your baseline of the GHRD, make sure the system comes up properly with that, then start stripping things out one at a time until it breaks (or doesn't). Or you could start with what you have and start stripping things out from that one at a time until the system comes up properly. If you get down to having an FPGA image that does not interact with the HPS at all and the U-Boot still crashes then there may be a board-level problem. Sorry, that's the best I can come up with. Bob