Forum Discussion
Yoda_Altera
New Contributor
8 months agoHi Nitin123,
Based on your comment, it should be safe to assume that:
- the Nios II is online & working
- the SPI HAL driver is present & can access the SPI Core soft IP
- the IO is working fine (Observed SPI transaction on the bus line)
With that, I would suggest comparing the observed SPI transaction with the MCP2515 sample waveforms.
And check if there are any differences.
For example,
With this Read Instruction, failure may be caused by:
- nCS line is not at logic ‘0’ level throughout the whole SPI transaction.
(Especially when there are multiple SPI agents, and the SPI Core soft IP might select the wrong nCS line) - Instruction sent in SI line is invalid.
- Address Bytes sent in SI line is invalid.
- SCK clock cycles ends prematurely.
Besides that, please review the following SPI Core settings in your design.
Altera’s SPI Core supports all SPI Modes.
The MCP2515 supports Mode 0,0 & Mode 1,1 only.
Regards,