lwip MicroC/OS-II throughput

hi rugbybloke

i've used the Stratix 1S10 development with the "full featured" example with some modifications:

-Nios II (f) 100 MHz,Instruction cache:16Kbytes,Data cache:4Kbytes

(also the SDRAM has a 100 MHz clock, with delay...)

-System_clk_timer->Initial period:10 ms (is the tick used by UCOSii)

-debug module level 1

-no onchip ram

Moreover, in the IDE, u have to set "optimization level: -O3" in your program and in the associated library.

My test program uses UNIX socket to only trasmit or receive continuosly (test tx or test rx) UDP packet of variable length: in the tx test i send an incremental counter to a software running in a PC connected through a LAN cross cable with the board, in the rx test i check this counter.

bye