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alemannia's avatar
alemannia
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7 years ago

Low coremark benchmark score on Cyclone V (ARM Cortex A9)

Hi, I'm using a low speed grade (-C8) Cyclone V with HPS (single core ARM Cortex A9). IC-5C SE B A4 U 19 C 8 S-TMP The code development is done on bare-metal (freeRTOS) with MPL as bootloader. All...
FawazJ_Altera's avatar
FawazJ_Altera
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7 years ago

Hello,

It seems this is a compiler optimization issue.

So you mentioned that when using the gcc or armcc, the performance is as expected, right? please correct me if I am wrong.

May I know which compiler did you use?

Thanks