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Altera_Forum
Honored Contributor
8 years agoLinux Boot from QSPI fails
Hi everyone, I'm trying to do a system boot from QSPI flash on a custom arria10 board. So far, I have managed to get the fpga image to configure successfully, but am having issues with the Linux sid...
Altera_Forum
Honored Contributor
8 years agoIn case it helps, I'll port the initial part of the boot log. I had to split it to fit in a post.
--- Quote Start --- Hit any key to stop autoboot: 0 SF: Read data capture delay calibrated to 3 (0 - 6) SF: Detected N25Q1024 with page size 256 Bytes, erase size 4 KiB, total 128 MiB Full Configuration Succeeded. SF: Detected N25Q1024 with page size 256 Bytes, erase size 4 KiB, total 128 MiB SF: 6225920 bytes @ 0x120000 Read: OK SF: 32512 bytes @ 0x100000 Read: OK FPGA BRIDGES: enable Kernel image @ 0x008000 [ 0x000000 - 0x3dd2d0 ] # # Flattened Device Tree blob at 00000100 Booting using the fdt blob at 0x000100 Loading Device Tree to 01ff8000, end 01fffbd3 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Linux version 4.1.22-ltsi-altera (esv@eswdmz3) (gcc version 5.2.6 [ 0.000000] CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instructie [ 0.000000] Machine model: Altera SOCFPGA Arria 10 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] PERCPU: Embedded 12 pages/cpu @dfbd1000 s19648 r8192 d21312 u4912 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pa8 [ 0.000000] Kernel command line: console=ttyS0,115200 root=/dev/mtdblock1 rw2 [ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Memory: 510732K/524288K available (6217K kernel code, 427K rwdat) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB ) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB ) [ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB ) [ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB ) [ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB ) [ 0.000000] .text : 0xc0008000 - 0xc07b6904 (7867 kB ) [ 0.000000] .init : 0xc07b7000 - 0xc0820000 ( 420 kB ) [ 0.000000] .data : 0xc0820000 - 0xc088adb8 ( 428 kB ) [ 0.000000] .bss : 0xc088adb8 - 0xc08ac610 ( 135 kB ) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Hierarchical RCU implementation. [ 0.000000] Additional per-CPU info printed with stalls. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] L2C: platform modifies aux control register: 0x72160001 -> 0x7251 [ 0.000000] L2C: platform provided aux values permit register corruption. [ 0.000000] L2C: DT/platform modifies aux control register: 0x72160001 -> 0x1 [ 0.000000] L2C-310 erratum 769419 enabled [ 0.000000] L2C-310 enabling early BRESP for Cortex-A9 [ 0.000000] L2C-310: enabling full line of zeros but not enabled in Cortex-A9 [ 0.000000] L2C-310 ID prefetch enabled, offset 1 lines [ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled [ 0.000000] L2C-310 cache controller enabled, 8 ways, 512 kB [ 0.000000] L2C-310: CACHE_ID 0x410030c9, AUX_CTRL 0x76560001 [ 0.000000] clocksource timer: mask: 0xffffffff max_cycles: 0xffffffff, max_s [ 0.000006] sched_clock: 32 bits at 100MHz, resolution 9ns, wraps every 2147s [ 0.000324] Console: colour dummy device 80x30 [ 0.000345] Calibrating delay loop... 1594.16 BogoMIPS (lpj=7970816) [ 0.089800] pid_max: default: 32768 minimum: 301 [ 0.089909] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.089920] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.090502] CPU: Testing write buffer coherency: ok [ 0.090533] ftrace: allocating 20733 entries in 61 pages [ 0.122682] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.122901] Setting up static identity map for 0x8280 - 0x82d8 [ 0.159789] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.159865] Brought up 2 CPUs --- Quote End --- What really sticks out to me is that the flash is not fully recognised/calibrated, when compared to the devkit which boots successfully. --- Quote Start --- SF: Detected n25q1024 with page size 256 Bytes, erase size 4 KiB, total 128 MiB [ 0.843980] cadence-qspi ff809000.flash: Cadence QSPI NOR flash driver [ 0.989833] List of all partitions: [ 0.993317] 0100 8192 ram0 (driver?) [ 0.998085] 0101 8192 ram1 (driver?) [ 1.002691] No filesystem could mount root, tried: jffs2 [ 1.008123] Kernel panic - not syncing: VFS: Unable to mount root fs on unkn) --- Quote End --- --- Quote Start --- SF: Detected n25q1024a with page size 256 Bytes, erase size 4 KiB, total 128 MiB [ 0.882094] cadence-qspi ff809000.flash: Read data capture delay for 50000000 baud calibrated to 1 (0 - 2) [ 0.891737] cadence-qspi ff809000.flash: n25q00aa (131072 Kbytes) [ 0.897936] 2 ofpart partitions found on MTD device ff809000.flash [ 0.904098] Creating 2 MTD partitions on "ff809000.flash": [ 0.909559] 0x000000000000-0x000003020000 : "Boot and FPGA data" [ 0.916108] 0x000003020000-0x000008000000 : "Root Filesystem - JFFS2" [ 0.923013] cadence-qspi ff809000.flash: Cadence QSPI NOR flash driver --- Quote End ---