Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Issue using SGDMA to frame buffer

Hi, I am buffering frames using an SGDMA. I was wondering if anyone has come across the following problem: After transferring successfully to the ddr2 with several descriptors, the ready...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi BadOmen,

- Can I use "Full Word Accesses Only" based on my use case described in the previous post? When using "Full Word Accesses Only", is the only constraint that our read/write addresses placed inside the descriptor must be a multiple of 4? My hope is to minimize resource utilization as much as possible.

- Would you recommend the use of the "Response Port" or leave it disabled?

- When I'm using AV-ST to AV-MM mode, let's say I fill the descriptor FIFO with 4 write addresses. Is mSGDMA expecting the corresponding 4 sets of data available right away on the AV-ST port or does it wait until it sees data on the AV-ST for each transfer? I guess I'm wondering what happens if due to upstream error, no data shows up on the AV-ST port.

- In the mSGDMA doc, a feature called "Park Read" was mentioned for frame buffering. Can you explain the concept here?

Thank you!