Issue using SGDMA to frame buffer

I would go with the mSGDMA in ST to MM mode. I assume each frame that comes in gets buffered into different memory locations so what you can do is use one descriptor per frame. Make sure to use it in Qsys since the DMA uses information from Qsys to figure out how wide the master address bus should be.

Since you won't have a host what I recommend doing is whatever is going to provide the descriptors into the DMA size the descriptor connection to be 128-bit wide for standard descriptors and 256-bit wide for enhanced descriptors. This will let you commit the descriptor into the DMA using either a single MM write or a single ST beat. The documentation will show you the format of the descriptor.

Also as a heads up I've been told of a bug from a few people about the descriptor FIFOs in the DMA sometimes not working. I'm certain it's a synthesis bug so make sure you set the FIFO depth to at least 512 to avoid Quartus attempting to synthesize those FIFOs using MLABs. Alternatively you can hack the RTL to force the FIFO to be synthesized out of M20ks or set a Quartus assignment that forces the FIFO into M20ks. The bug causes the descriptor data getting turned into zeros which prevents the DMA from working correctly.