Is there a way to send periodic time updates to an FPGA over JTAG/UART?

You would probably be better off just implementing (S)NTP in your board using Ethernet directly. Or if you feel that's overkill, just write your own UDP broadcast with the time information in it that gets sent to your boards: your ethernet switch(es) should do a better job delivering the packet in a timely fashion than Altera software -> JTAG -> (IP blocks) -> (NIOS software) could ever do.

But if you are forced to resort to JTAG, I would recommend just instantiating a JTAG UART for this purpose, then on your host you can write software which uses stdin/stdout pipes to open the "nios2-terminal" process so you can easily write/read the time data with the board. There's no problem or complication having multiple nios2-terminal instances running (to multiple hardware sets).

But again, if you want "some sort of high degree of precision", since you've got Ethernet available I would say just do NTP in your board.