Is it possible to read or write data on every clk cycle in Avalon MM interface?

Depending on details, it may be possible with a pipelined interface. I'm not sure if it would be possible with a bursting interface (you would need to pipeline the burst requests as well).

Depending on what you're doing, it might be simpler to run the Avalon-MM at a higher clock rate with bursting in order to achieve your net required throughput.

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/manual/mnl_avalon_spec.pdf

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3.5.3 Pipelined Transfers

Avalon-MM pipelined read transfers increase the throughput for synchronous slave devices that require

several cycles to return data for the first access. such devices can typically return one data value per cycle

for some time thereafter. New pipelined read transfers can start before readdata for the previous

transfers is returned. Write transfers cannot be pipelined.

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