Honored Contributor
Honored ContributorIf you don't want to create a custom component neither modifying standard source code, the easiest way to accomplish your task is to use a lpm_fifo in dual port mode.
Connect the write port to your ad9254 component output, connecting wrreq port to a signal which allows you to push into the fifo data at the required sample rate (maybe the valid or output enable signals are already good for this). Then you connect the read side of the fifo to the sopc component; make sure to generate the component with the 'empty' port, in order to know when adc data is available. Then you can use the pio or a tristate bus to extract data from the fifo. You only need to generate the rdreq signal to pop data out. Read the fifo megafunction user guide for detailed information. Choose the optimal fifo depth based on the needed sample rate and on your poll cycle latency. Cris
