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Altera_Forum
Honored Contributor
Honored ContributorIORD_ALTERA_AVALON_PIO_DATA to slow?
Hi, I'm trying to capture samples from an A/D Converter and streaming them onto a PC via an ethernet connection. I've extended the triple speed ethernet design example from the Nios II v9.1 instal...
Altera_ForumHonored Contributor
Honored ContributorCount the number of samples you collected for 1 phase of the 10kHz signal - that will give you the speed your poll loops runs at.
Your code loop will need (at least) the following instructions (and if you write the appropriate C the compiler can be persuaded to generate them): - load from the AD - store to memory - register increment for memory address - compare and branch (memory address against array end) Allowing for the extra clock for the 'predicted taken' branch, and provided the instructions are ordered properly (you need 2 clocks between the load and store), the minimum loop cost is 5 clocks + the ADC read/cycle time. There will be at least 1 clock extra delay in the read of the Avalon slave for the ADC.
