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Altera_Forum
Honored Contributor
20 years agoif you talk about a pio, the external signal must be active for some clock cycles (don't know
exactly how much) to get sampled. if you talk about a user component: that's tthe way I do it: in a user component, I have a bit in a register (flipflop) which is set to generate an interrupt (signal irq); in the interrupt service routine, I clear this bit by writing to the irq-register of the component; so irq signal of the user component stays active until it's service routine is called.