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Honored Contributor
Honored ContributorInterfacing Nios II with verilog module
Dear All, I would like to start by saying I am quite new to HDL, FPGAs and the IDE. I've worked through a few digital design examples entirely but I feel like I want to tackle a larger problem ...
Altera_ForumHonored Contributor
Honored Contributorbattersea, the simplest method to connect to your custom built module is using PIO in the Qsys system. In that case you will communicate with your designed peripheral as if it is an "external peripheral" to your Qsys system and you are linking with it using general purpose I/O ports from a processor (basically how microcontrollers connect with on board peripherals).
If you already know how to use the Qsys PIO peripheral, you can create a few in your Qsys system, connect their exported conduit to your custom written block and then toggle the signals or read them as required via the PIO. If your custom block only requires basic I/O then using PIO will be simpler for you at this stage.
