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Altera_Forum
Honored Contributor
Honored ContributorINCLUDE SOFTWARE INTO EPCS (.jic)
Hello, i tried many different method on how to include my software for nios2 processor (.elf file) into the jic file together with the .sof fpga file. I have an fpga with a nios2 processor. I...
Altera_ForumHonored Contributor
Honored ContributorOK.
Your processor has a reset vector which tells it the adress where it has to begin to load the code. When you use eclipse to load the code, the reset vector set at Onchip_ram is good because eclipse writes directly the RAM by JTAG. But when you want to load the software from a flash memory, you have to tell the processor to take the code from this flash by his own. And that is what the "epcs_flash_controller" do. This IP has a small ROM which contains some code. This code only read a flash memory and tells the processor to start from here. So add this IP in your Qsys, set the reset_vetor in your processor IP and it should starts.
