I want to design bcd to decimal decoder using structural style. I did it successfully but the problem when I simulate it in Modelsim it does not meet with the truth table.

Change the 4-input NAND implementation as it is incorrect. Use the following and then check your BCD to Decimal ckt.

library ieee;
use ieee.std_logic_1164.all;
 
entity nandg1 is
port(A,B,C,D: in std_logic;
        y: out std_logic);
end nandg1;
 
architecture df of nandg1 is
begin
 --y<= (a nand b) nand (c nand d);
    y <= not (a and b and c and d); 
end df;