Forum Discussion
Altera_Forum
Honored Contributor
8 years agoHi kyle ,
Really thankful to you.Just tell me where in the tool we can see the peripheral pin outs and top leve file as mentioned and then the mapping. If I get all three then I may get some hint......I cannot see the mapping if I get I might get some idea.. regards Ravi --- Quote Start --- Hey Ravi, Looks like you have too many assignments.... please remove all... For the HPS pin outs... from the GPIO you need to make sure they are selected in the peripheral pin outs as exported GPIO (which you look to have done with GPIO_1). This is then built into the top level file with your pin as GPIO_1: INOUT STD_LOGIC in the port declarations and then mapped to the port map for the qsys ip. (part of the tutorial). Now this map is to hps_io_hps_io_gpio_inst_GPIO1 => GPIO_1 in your case... so the system is linked to the top level pin (specified as INOUT as this is normal for a GPIO). Now in order for the preloader to know you want that top level pin [GPIO_1] enabled you need set it once in the assignment editor... GPIO_1 Assignment name-> I/O standard 3.3V LVTTL(value) Enabled(yes) <- this is the only one you need... i think you might of named it in a vector or something but just trial one first to make sure your doing it right. I cannot help you any more than this. If it still not works out it may still be a hardware failure but unlikely. Best of luck Kyle --- Quote End ---