ABary
New Contributor
New ContributorHPS DDR3 assigments
I have a prototype board that uses a DDR3 SDRAM connected to HPS in Cyclone V device. The board has a error, bank pins BA[0] and BA[2] are swapped. Is it the way to re-swap this outputs ?
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ABaryNew Contributor
New ContributorMany thanks for replay. In PCB pin HPS_BA[0] from HPS is connected to pin DDR_BA[2] on DDR3 memory (2 chips of 256Mx16), pin HPS_BA[2] is connected to DDR_BA[0], pins for address bit [1] are connected correctly. This error was detected, because of DDR calibration failed during U-boot preloader start.
Datasheet of used memory devices shows that mode registers are selected by BA[1..0] just. I hope there is the way to swap this bits, maybe in u-boot sources, or, I know it's crazy, in HPS system verilog sources.
Regards,
Andrew
