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Altera_Forum's avatar
Altera_Forum
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13 years ago

How would one put the FPGA HW + Nios II SW image together on the following memories

When it comes to external memories to store configuration data, we have the following options:

1. EPCS.

2. EPCQ.

3. CFI Flash.

4. Quad SPI.

5. NAND Flash.

If I have a design containing NIOS, how would I put the HW (that comes from .sof) + SW (that comes from .elf) images into a single image to program any of these flash memories? What steps are needed? Are the steps the same for them?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    For EPCS, you would use the EPCS Serial Flash Controller Core IP block and use a JIC programming file.

    For the parallel and SPI flash, I believe you are looking at multiple images needed.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Hi,

    i do create my epcs images using the following commands from the Nios Command Shell: 

    
sof2flash --epcs --compress --input=hw.sof --output=hw.flash
elf2flash --epcs --after=hw.flash --input=sw.elf --output=sw.flash

    Now i do have 2 flash files which are combined via: 

    
cat hw.flash sw.flash > image.flash

    And converted to epcs binary 

    
nios2-elf-objcopy -I srec -O binary image.flash image.bin

    Now your image.bin can be wriiten directly to address 0 of your epcs, or to another address if you use the Remote_Config IP.

    I do not have any experience concerning the other Flash types, but think there's an equal approach.