Forum Discussion
Altera_Forum
Honored Contributor
21 years agoThis is a problem with the Opencores.org EMAC component ptf file. When the SOPC system is specified as being created in VHDL, the Verilog source files don't get compied over. You can work around this by copying all the Verilog files from the Opencores.org EMAC component directory (<nios 2 directory>/components/opencores_ethernet_mac/) to your project directory.
Dennis Scott Microtronix Datacom Ltd.