--- Quote Start ---
Reference designs use Nios & Qsys, and the IP behind them, for good reason. It can be very involved.
However, if you want to interface directly to the Ethernet Phy then you can consider implement an MII interface in logic. How practical a solution you can realise will depend on the protocol the kit you're interfacing to is running. Full Ethernet stack? Then it's going to be difficult.
See Wikipedia '
media-independent interface (
https://en.wikipedia.org/wiki/media-independent_interface)' for starters.
Cheers,
Alex
--- Quote End ---
Hi, thank for answering me.
Actually, here's my problem now:
I'm having a DE4 board using a Stratix IV FPGAs, with 4 Ethernet ports. This board is used for collecting data from an other device. But that's not a main part, my project require me to transfer 4 data paths with speed of 128 Mbit/s to a host PC.
Do you have any solution for this?
As I see it now, my solution was designing a logic module to help transfer collected data directly from the FPGAs to host PC through Ethernet connection to increase transferring speed. Because I have a friend working on Nios solution and his result for transferring collected data is not so good.
In 2nd post, it's a interface for Marvel 88E1111, an IC the board used as a bride between FPGAs and Ethernet port.
Thank you.
Honored Contributor
