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The nios is only ever going to generate 32bit Avalon cycles - so your 64bit transfer will always be two Avalon bus cycles.
Personally I wouldn't use IOW() - the semantics are all wrong and it is very error prone.
You want to generate a C structure that matches your register definition (probably with some fields marked 'volatile') and 'arrange' for a pointer to do uncached accesses (possibly by getting the linker script to generate an absolute symbol).
You might find it easier to dual-port an internal memory block (tightly coupled to the cpu) and use that for data transfer.
The 'actions' could be initiated by an Avalon write, but you might find that a multi-cycle custom instruction is more appropriate.
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Hi dsl, I came across your reply on this thread when I was searching for solution I have with writing a value to an pio from Nios as I posted here (
http://www.alteraforum.com/forum/showthread.php?t=48744)
You mentioned "Personally I wouldn't use IOW() - the semantics are all wrong and it is very error prone.". So , what do you mean by "the semantics are all wrong" and could you please suggest on what to use to replace IOWR? Thank you
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