How to implement very basic custom QSys component

I didn't use a tcl, only a vhdl and the component editor with the analyze file and then proceeded from there; however, Cris72 did get me thinking about the bus and byte lanes. I converted the vhdl to 32bit bus and it works fine now. So I guess the question now is, why don't I get the write when I use an 8bit bus.

Edit......

I did a bit more trial and error and found that I can do 32/16/8 bit bus as long as the Qsys address is on a 32bit boundary. With any other boundary, I don't ever get the 'write'. I know how to use byte lanes for an 8 bit periph, but it does no good if I don't get a 'write'.

So what do I need to do get the 'write' if my periph is not on a 32bit boundary?