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Altera_Forum's avatar
Altera_Forum
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12 years ago

How to implement very basic custom QSys component

I know this question has to have been posted and answered, but I can't find it in a way I can understand and solve my problem. My effort is very basic and I'm new to the QSys way of FPGAs. Basi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Try declaring my_register as a alt_u32.

Your custom component doesn't care of addr nor byte enable signals. Since Avalon is a 32bit bus, I guess the 8bit access could possibly write inconsistent data because Nios actually generates 4 8bit writes to complete the 32bit word.