How to configure/access Cyclone V HPS EMAC counters.

Hello Dzar,

I have tried some settings before reading from frame counter. Please note this is from EMAC1, since my dev kit uses EMAC1 :(

However, you might try set these registers first:

https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/hps.html#topic/sfo1410069057648.html

This is the control of MMC.

The interesting information here is, you can enable/disable broadcast frames, enable full/half preset counter, etc...

The interesting part when I tried memtool in linux was, each time I read, there was a reset to the counters. This MMC control allowed me to turn-off this feature, so I can read the counters without being reset.

This is the command I used: (this command initialize the MMC counters control)

memtool -32 0xFF702100=0x1f0

then I read the counter:

memtool -32 0xFF702188 1

And I can find the counter is increasing accordingly.

Please note the above bold addresses were tested since I am using EMAC1 only. You might need to change them to 0xFF700100 and 0xFF700188 for EMAC0, respectively.

Can you please try this on linux, if it works, then you need to apply these settings to DS-5 before you run your code.

I suspect mostly the reset configuration after each counter read you do. This option should be disabled to maintain the number of frames.

Thanks