How can I design RTL top component including sub HLS components?

Hi,

I have created one component IP using intel HLS and I would like to create a top component code that five components is instanced.

And each instance is timing parallel. Can I put component to top component?

I read resource sharing method in HLS loop optimization technique document.

There is one example about implementation of this technique.

'Using loops to share hardware resources'

void foo(int x) {}

component int bar(){

int arr[3] = {7,12,17};

for (int i = 0; i < 3; i++) {

foo(arr[i]);

...

}

Are components instead of normal function possible to be inlined inside the component?