Just like in the picture, by using the comma you are telling it to merge the signals left to right. So in1 maps to out[1], and in0 maps to out[0]. Another way if it makes things neater is by simply calling the single lines out[0] and out[1], after that if you refer to out[1..0] Quartus will already know to put those together as a bus. (Just like in the "C" language you can have an array but work with the individual elements one at a time)
That wire symbol in the picture means that you are taking one net name (in0 and in1) and giving it another name (out[0] and out[1]). This is so that Quartus doesn't flag it as an error (it's not a design error, but just how the design gets processed overall).