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Altera_Forum
Honored Contributor
12 years agoHi,
--- Quote Start --- Everything is okay, I checked all timing specifications at pp.53. However, the SCL's frequency is never higher than 12kHz, even if I set the struct i2c_gpio_platform_data's udelay field (in the linux module) to 2 for example. Normally, the SCL's frequency should be 500kHz when setting udelay to 2. Anyway, even at 12kHz, the RTC device should acknowledged to I2C frames. --- Quote End --- Please note that the SLC's frequency is not so important, but its tf and tr are important because SLC is used as the clock of Flip-Flops. If you observe the same 'half voltage' phenomenon at the 9th clock rising edge, please change the pull-up resistors value high if possible. If you can lower the voltage, this is the problem of m41t83's output abilities, though it means some malfunction. And of course, you connect X'tal etc. and the internal circuit of your m41t83 is working correctly? Kazu