GCC and FPU

Thanks for the explanations and suggestions.

3 instructions per op are not a big issue with e.g. division which takes 10 cycles,

but compare can be done in one cycle. Anyhow I think the real issue is register

allocation and optimization. I have a reference hardware - powerpc with floating

point unit which has 32 internal double precision registers. With it gcc can produce

much faster/smaller code - in some of my cases more than 2-3x times faster.