FPGA-to-HPS SDRAM Bridge in Bare-metal

Hi,

This may be what you need. I found it on Altera website... Please see the attachment.

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Custom read and write master templates

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This design requires the Quartus II design software 8.0 or later. Each template

allows you to easily access the system interconnect fabric using a simple start

and acknowledge protocol to control the data movement. To learn more refer to

the file "Avalon_MM_Masters_Readme.pdf" available from with the file

"exm_avalon_mm_master_templates.zip".

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