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Altera_Forum
Honored Contributor
Honored ContributorFPGA-to-HPS SDRAM Bridge in Bare-metal
FPGA-to-HPS SDRAM Bridge in Bare-metal I am using DE1-SoC to start bare-metal programming for dual-core Cortex-A9 ARM hard processor, Cyclone V. I'm trying to read data from SD...
Altera_ForumHonored Contributor
Honored ContributorCould this be related to the issue you are seeing?:
https://www.altera.com/support/support-resources/knowledge-base/embedded/2016/how-and-when-can-i-enable-the-fpga2sdram-bridge-on-cyclone-v-soc.html?utm_source=altera&utm_medium=newsletter&utm_campaign=facts&utm_content=na_how_can_i_enable_ki_15_08_2016
