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Qsys tells it's an altera_avalon_onchip_memory2, I don't know if it's the same as altsyncram...
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Looking at the Qsys GUI is not the same as reading the code. Generate your Qsys system, and then look at the synthesis code. There will be either a component instance called altera_avalon_onchip_memory2 or there will be a file with that name. It will use an altsyncram :)
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The address is controlled by a VHDL line:
addr <= std_logic_vector(to_unsigned(tstep, addr'length));
Tell me if I shouldn't do that.
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If the RAM is in Qsys, then you don't get to control it, unless of course you have added a dual-ported RAM to your Qsys system and exported one side of the RAM to the top-level. Either way, this is not enough code to tell what you are doing. Basically it looks like you're converting an integer tstep to a std_logic_vector, but you have not shown how you update tstep.
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Thanks for that. Is the Memory Initialization File better?
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Better than what? You asked how you can initialize it from file.
You can use RAM/ROM initialization files when you want the RAM to contain "something" at power-on, eg., a processor bootloader program. Whether you need an initialization file or not depends on what you are trying to do.
Cheers,
Dave
Honored Contributor
