ExplicitAddressSpan for Avalon Memory Mapped Tristate Slave

If I remember correctly explicit span limits the addressable space of the slave. So if you had a component with 10 address bits and 32-bit data that would be a 4kB span. Then you could say the explicit span is 3.5k to limit the span further. I can't think of many reasons why you would want to do this so I recommend that you don't use this feature.