Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Error (10170): Verilog HDL syntax error at nios_system_inst.v

Hello all, I got the following error while trying the Introduction to the Altera SOPC Builder Using Verilog Design SOPC Tutorial. I'm using Quartus II 10.0 . I'm lost on figuring it out. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

I'm getting the same error as mentioned here. Couldn't find any syntactical error in the code. Moreover, it is a Quartus auto-generated code which is not running in Quartus :confused: :rolleyes:. Please help me compile this.