Honored Contributor
Honored Contributor
just wanted to raise the awareness of the "virtual memory" epcs peripheral (http://www.fpga.nl/index.html?ipcores.html).
it doesn't look like it's been updated in a while, but it should provide a cleaner interface to everyone interested in using an epcs and/or serial (spi) flash device.
this is also mentioned on the "post your ip" section of this forum. in fact, i think it was one of the first to be posted...
best regards,
- slacker
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--- Quote End --- Not to knock someone elses work, but I don't see how that interface is cleaner... 1) This driver doesn't require a special core, it uses Alteras EPCS core, 2) This other core won't let you use the Altera tools to bootload the FPGA, and 3) It won't let you use Altera tools to directly access the EPCS device, which is a big advantage. Also, it requires the clock to the core to be less than 20M... this wouldn't be that hard to change however.. JFFS2 and MTD Drivers are specifically optimized for Flash devices such as the EPCS device; it caches the writes so that it optimizes erase cycles. This would be more difficult to do with this other core I believe.
